The present invention relates to lithographic printing of integrated circuit (IC) designs on semiconductor wafers, and more particularly to a method for manipulation of data describing a mask pattern to compensate for etch bias effects when the pattern is subsequently etched into a semiconductor wafer.
In lithographic printing, a mask containing an image of an IC design is interposed between a semiconductor wafer and an illumination source. Ultraviolet radiation of varying wavelengths is projected from the illumination source, through the mask and reduction lenses, and onto photoresist (resist) coating the wafer surface.
The mask defines areas where the radiation is blocked, and areas where it is allowed to pass through and form an exposure field on the resist. In areas where the resist is exposed, the solubility properties of the resist are changed. Effectively, the image of the design contained in the mask is transferred to the resist. The films under the resist may be subsequently etched away to effect a physical transfer of the design into the wafer.
For current semiconductor chip and lithography technologies, dimensions on the wafer are being printed that are shorter than the wavelength of the radiation used to print them. This causes deviations in the original design to be introduced by diffraction effects. Diffractions effects include, for example, corner rounding and line foreshortening. In corner rounding, shapes in the IC design which should have sharp, right-angled corners will acquire a certain non-zero radius of curvature when printed. Line foreshortening causes lines in the design to be printed with the incorrect length. Unwanted optical interactions referred to as proximity effects can also occur when shapes in a design are too close to each other.
Known techniques exist for pre-processing design data before it is transferred onto a mask for printing in order to compensate for the known optical effects described above. Optical proximity correction (OPC), for example, is a known computer-implemented process for compensating for optical effects by adjusting shapes in the design prior to lithographic printing to ensure that when printing is performed, undesirable optical effects are eliminated or within tolerable ranges.
However, there are other effects which can cause deviations in the transfer of a mask pattern onto a wafer which are not known to be accounted for by existing methods. For example, in reactive ion etching (RIE), an etch bias further introduces deviations in the original design due to the proximity of other shapes.
In view of the foregoing, a method is needed which accounts for local variations in the etch bias as well as optical proximity effects, in order to make a more thorough compensation to mask data and thus achieve a more accurate reproduction of the original design when the mask is printed and etched.
According to the present invention, design data is treated to correct for etch bias effects.
In an embodiment, shapes or image data of an integrated circuit design is processed to obtain a representation of the images in terms of line segments and associated spaces adjacent to the line segments.
Using an etch bias matrix which specifies, for a range of line widths and associated spaces, a compensating line edge adjustment, the line segments are shifted based on adjacent line segment proximity. Application of the adjustments provided by the etch bias matrix produces an adjusted or corrected design data set which includes the appropriate etch bias corrections for producing a more accurate etching result.
In another embodiment of the invention, characteristics of shapes data of an IC design are used to create region definitions in terms of selected characteristics. An etch bias is defined for each of the regions. A marker shape data set is then created for the IC design which partitions the IC design into sections corresponding to criteria associated with the different regions. The IC design is overlaid with the marker shapes, and the etch bias corresponding to each marker shape is applied to the edges of the design, to produce image data corrected for etch bias.
According to another embodiment of the invention, effects of etching are treated in a more global manner. A pattern density grid of an IC design is created, and an etch bias characteristic for each grid element is determined. The IC design is overlaid with the pattern density grid. Each edge of the design that falls within a particular grid element is corrected by the etch bias factor associated with that particular pattern density.